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SiFive Completes Series F Funding Round: +$175m, $2.5b Evaluation
The three main architectures currently in the ecosystem that people talk about are x86, Arm, and RISC-V. It’s that last one we’re focusing on, as the newest on the block and it is slowly becoming a...
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VIA Part 4 – A Deep Dive into Centaur’s Last CPU Core: CNS
The x86-64 instruction set powers the vast majority of PCs, consoles, and servers. However, the number of x86 licensees has always been small, so it’s important to keep track of the few that are left....
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GPU Hardware Video Encoders – How Good Are They?
Figuring out the best way to encode a video is very computationally expensive, and it might not a good idea to throw a ton of CPU cycles at encoding video when you’re running a game. That’s why modern...
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Intel Renames Oregon Fab: Gordon Moore Park. Adds +270k sq ft, 18A Node now 2024
If there’s one thing that’s cheaper than building a new fab, it’s expanding an existing one. Intel’s Oregon D1 facility has been the hub of all of its technology advancements over the past 20 years,...
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Centaur CHA’s Probably Unfinished Dual Socket Implementation
Centaur’s CHA chip targets the server market with a low core count. Its dual socket capability is therefore quite important, because it’d allow up to 16 cores in a single CHA-based server....
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Examining Centaur CHA’s Die and Implementation Goals
In our last article, we examined Centaur’s CNS architecture. Centaur had a long history as a third x86 CPU designer, and CNS was the last CPU architecture Centaur had in the works before they were...
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iGPU Cache Setups Compared, Including M1
Like CPUs, modern GPUs have evolved to use complex, multi level cache hierarchies. Integrated GPUs are no exception. In fact, they’re a special case because they share a memory bus with CPU cores. The...
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Graviton 3: First Impressions
In late May of 2022, AWS released Graviton 3 to the general public. Graviton 3 was the first ARM CPU to introduce the SVE instruction set to a widely accessible server CPU. Before Graviton 3’s general...
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Sunny Cove: Intel’s Lost Generation
This is going the be the first in a series of articles on CPU architectures. We’re picking up where Real World Tech left off with its microarchitecture deep dives. And we’re going to be doing them...
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Intel’s Netburst: Failure is a Foundation for Success
In the world of today’s high performance CPUs, major architectural changes don’t happen often. Iterating off a proven base is safer, cheaper, and faster than attempting to massively rework the basics...
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Tachyum: Too Good to be True?
Author’s Note: Since the publication of this article, we have since had an interview with Tachyum and nearly all of the architectural analysis done in this article is outdated but it will be kept up...
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Alder Lake’s Caching and Power Efficiency
Processor caches are known to improve performance, but they also significantly influence power efficiency. Modern CPUs spend a lot of power to move data around. If data can be pulled from sources...
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Caching Energy Efficiency Data – Mobile and AVX-512
A few days ago, we looked at the power costs associated with moving data on some desktop parts. This is a short follow up with some data from Zen 3 and Willow Cove in mobile configurations, as well as...
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AMD’s Athlon 64: Getting the Basics Right
Two decades ago, AMD’s K8 architecture went head to head against Intel’s best. But unlike the “Zen versus something-lake” situation today, the K8 versus Netburst situation is particularly interesting...
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A Preview of Raptor Lake’s Improved L2 Caches
Caching is important. We recently got a subset of our test suite run on an engineering example of Raptor Lake. Those results let us take a look at Intel’s changes to their caching hierarchy. Because...
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Tachyum’s Revised Prodigy Architecture
The world of semiconductor startups looking to break into the market is huge, either with some large AI training chip, or some super fast small inference device, or perhaps a HPC focused design for...
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Hot Chips 34 – Tesla’s Dojo Microarchitecture
To say Tesla is merely interested in machine learning is an understatement. The electric car maker built an in-house supercomputer named Dojo, optimized for training its machine learning models....
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Hot Chips 34 – Intel’s Meteor Lake Chiplets, Compared to AMD’s
During a presentation at Hot Chips 34, Intel detailed how their upcoming Meteor Lake processors employ chiplets. Like AMD, Intel is seeking to get the modularity and lower costs associated with using...
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How Quickly do CPUs Change Clock Speeds?
We often see very high clock frequencies listed for our CPUs. But CPUs don’t run at maximum clock all the time in order to reduce power consumption and heat generation. They also can’t instantly go...
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Hot Chips 34 – AMD’s Instinct MI200 Architecture
It’s no secret that AMD has been slowly but surely executing on their plans to achieve leadership in all domains of computing. On both the server CPU and consumer sides, we have seen them break into...
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